Back in December 2009 I wrote
If it turns out that some of AMD's XOP instructions are so useful that the software industry will ask Intel to copy them, then we may fear that Intel will choose a VEX encoding for these instructions rather than making their code compatible with AMD's.
Now they are doing exactly this. When AMD announced their planned XOP instruction set they also announced the "CVT16" instructions for supporting floating point numbers with half precision, using their XOP code prefix. The names of these instructions were VCVTPH2PS and VCVTPS2PH. Now Intel have announced two almost identical instructions with the same names, but using their own VEX code prefix. Furthermore, AMD have postponed the implementation of these instructions. Whether they have done so for the sake of compatibility with Intel's instructions, we don't know.
If Intel had allowed AMD to use part of the huge VEX opcode space then this would not have happened. We can only speculate what is going on behind the scenes...
Link: Intel Advanced Vector Extensions Programming Reference, Aug 2010. |
Stop the instruction set war new - Agner Fog - 2009-12-05
The instruction set war's effect on virtualization new - Yuhong Bao - 2009-12-28