Agner`s CPU blog

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Stop the instruction set war
Author: Agner Fog Date: 2009-12-06 04:28
Thank you to Yuhong Bao and others for sending me information about more conflicts over the instruction code map.

The company Cyrix has used many codes on the 0F xx map for their instructions, apparently without having an agreement with Intel. See sandpile.org for a list. Many of these codes are now used for other purposes. For example the Cyrix instruction SMINT originally used the code 0F 7E. Later, Intel used the same code for the instruction MOVD, so Cyrix had to change their code for SMINT to 0F 38. Today, the latter code is also used by Intel. The Cyrix processors have been continued as AMD Geode processors where the conflicting codes are still used (including 0F 38), though they can be disabled.

Vacant codes are also needed by software producers for virtual instructions that can be emulated. Microsoft is using the code C4 C4 in Windows for such a purpose. This code now conflicts with the new VEX instructions, which is the reason why Intel had to disable VEX instructions in 16-bit real and virtual mode. Only two codes are reserved for software emulation. These are called UD1 (0F B9) and UD2 (0F 0B).

The instructions POPCNT and RDTSCP were implemented first by AMD and later copied by Intel.

[Corrections made 2009-12-07 and later thanks to Yuhong Bao and others]

 
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