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Proposal for an ideal extensible instruction set
Author:  Date: 2016-01-05 06:47
Just an additional explanation for my previous post.

I was not clear enough, but one possible modification of your encoding scheme for vectorial operations would be to keep 0 = scalar registers & 7 = vector registers of maximum length, but to have 1 to 6 specify a vector length register, e.g. r9 ... r14.

This would partially loose the advantage of your encoding scheme of allowing old programs to run unchanged on new processors with longer vector registers.

Nevertheless, that could still be done, by querying the maximum length of the vector registers with CPUID and acting accordingly. The ability of performing a vector operation with a specified vector length would make easy the writing of generic programs that would process correctly the final or initial part of the data arrays, regardless of the length of the implemented vector registers.

 
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