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Haswell upper128 power gating
Author: Agner Date: 2016-01-30 01:23
John D. McCalpin wrote:
the presenter was pretty clear, saying that the whole AVX2 "area" was powered off.
I don't think there is a special "area" just for AVX2. The execution units are
divided by functionality, not by instruction set. The commercial presentation was just simplifying things.
Re-reading Agner's comments leaves me with the impression that he has not seen the ~10 microsecond stall on any processors tested. Is this correct? If so, which Haswell models were tested?
It was not a stall, but a 14 ┬Ás period of reduced throughput for all 256-bit instructions, both AVX and AVX2. I have seen this only on Skylake. The processors tested are listed in my instruction tables (Haswell family 6 model 3C).
 
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