Agner`s CPU blog

A-11:
That adds some hard decisions in C++ compilers : it forces the compiler to potentially reorder things (for instance, grouping 2B instructions together), possibly encourages the compiler to heavily favor small instructions (maybe even breaking down large 8B instructions into two or three 2B instructions). Though it also has some benefits: it gives you multiple instruction size without needing a prefetch buffer and it's easy to decode. And I guess you could design it so that 2B instructions generate a single micro op, 4B instructions can generate two micro ops, and 8B instructions can generate 4 micro ops, which would let you align instruction queue inputs to instruction cache outputs, and multi-output instructions could be forced to use larger encodings to ration register write ports.