Agner`s CPU blog

-- begin recipe --
(0)
Prepare an empty stack "Parser stack".
Each item of stack holds immediate value or loadiing from architectural stack which must be renamed to register file.
But the bottom item of this stack may hold a Hyperblock.

(1-arg)
If next instruction is an immediate or loading from architectural stack, push it into Parser stack.
ex.
Parser stack before : { [sp+3] ; $4 ; add } ; $5 ;
next instruction : [sp+5]
Parser stack after : { [sp+3] ; $4 ; add } ; $5 ; [sp+5] ;

(1-op)
If next instruction is a N-in-1-out (inc, add, fma3, etc) or N-in-0-out ("store [sp+2] top-of-stack", etc) micro op
[1] Pop N items from Parser stack, concatenate them with the next instruction into a Hyperblock.
[2] If items remain in Parser stack, output each of them as individual Hyperblock.

[3-1out] If next instruction is 1-out op, leave the Hyperblock made at [1] on the bottom of Parser stack.
ex.
Parser stack before : { [sp+3] ; $4 ; add } ; $5 ; [sp+5] ; $7
next instruction : add(2-in-1-out op)
outputs :
{ [sp+3] ; $4 ; add } ;
$5 ;
Parser stack after : {[sp+5] ; $7 ; add } ;

[3-0out] If next instruction is 0-out op, output the Hyperblock at [1], thus Parser stack should be empty.
ex.
Parser stack before : { [sp+3] ; $4 ; add } ; $5 ; [sp+5] ; $7
next instruction : store [sp+2] top-of-stack (1-in-0-out op)
outputs :
{ [sp+3] ; $4 ; add } ;
$5 ;
[sp+5] ;
$7 ; store [sp+2] top-of-stack ;
Parser stack after : (empty)

(1-other)
For other cases, 2-out op like "divmod", reaching max length of Hyperblock, control flow instruction and so on.
output each of items in Parser stack as individual Hyperblock, thus Parser stack should be empty.

(2) To iterate, go back to ether of (1-*) depending on next instruction.
-- end recipe --

Though I mentioned before RS entry should be toward individual processor, they must be tiny enough to lack lots of unit.
Anyway, each RS entry in a current conventional CISC processor lacks ability for flow control , "mov" elimination by renaming, nor Out-of-Order execution.
So Hyperblock should not contain "mov" instruction nor concurrent flow like below.
($4 $5 add) ($2 $3 shift-left) // these process have no dependency, thus should detect concurrency.
swap-top-2-item div // "swap-top-2-item" should be eliminated with renaming.
This is the reason Parser stack should become empty every time when it meets a micro op.
Parser stack is parse time emulation of the stack inside a RS entry.
You may point out
$4 ($2 $3 shift-left) add
has no concurrent flow.
I ignore them to make recipe simple to implement easily on hardware.

For ops which have 2 or more outputs, I have not gotten the easy way how to treat them.