Vector Class Discussion

Implementation for Intel Xeon Phi ?
Author: Agner Date: 2013-10-15 01:34
There is some confusion over which instruction set the Xeon Phi will use. The first manuals published in 2012 described an instruction set variously named "Knights Corner instruction set" and "Xeon Phi coprocessor instruction set". This instruction set has no CPUID bit so it is not possible to make a dispatcher for it. There are rumours that this instruction set is being replaced soon by the AVX-512 instruction set, which is very similar. Both instruction sets are backwards compatible, but they are not compatible with each other - differing by a single prefix bit even for otherwise identical instructions.

AVX-512 will run both on the MIC coprocessors and the mainstream CPUs. My plan is to support AVX-512 when it is available in mainstream CPUs and supported by the major compilers.

I think that the ABI standards (function calling conventions) are not completely fixed yet and AVX-512 has some problems with preparing for future extensions (see software.intel.com/en-us/forums/topic/477541 ) so it will take some time before everything is in place.

 
thread Implementation for Intel Xeon Phi ? new - Wilfried KIRSCHENMANN - 2013-10-15
last replythread Implementation for Intel Xeon Phi ? - Agner - 2013-10-15
last replythread Implementation for Intel Xeon Phi ? new - Sylvain Collange - 2013-10-28
last reply Implementation for Intel Xeon Phi ? new - James Amundson - 2014-01-14