Vector Class Discussion

Implementation for Intel Xeon Phi ?
Author:  Date: 2013-10-28 04:36
Hi Wilfried, Agner,

I have started to write some vector classes for the MIC, sticking as much as possible to the design and interface of the other vector classes. I wrote the code for use in projects of my own, but I will be happy to contribute it if there is any interest.

It only supports basic operations on Vec8d, Vec16i, Vec8b and Vec16b for now, does not support dynamic dispatching (which I do not think is such an issue as the MIC is not binary compatible with mainline x86 anyways), is not production-quality and has no documentation. But it might be enough to get started and add the missing features along the way.

Hopefully, AVX-512 intrinsics should be close to those of Xeon Phi, even though the instruction encodings are different. I expect most of the work for supporting Xeon Phi would apply to AVX-512, with minor modifications for dispatching and adapting to ISA idiosyncrasies.

Regards,
Sylvain

 
thread Implementation for Intel Xeon Phi ? new - Wilfried KIRSCHENMANN - 2013-10-15
last replythread Implementation for Intel Xeon Phi ? new - Agner - 2013-10-15
last replythread Implementation for Intel Xeon Phi ? - Sylvain Collange - 2013-10-28
last reply Implementation for Intel Xeon Phi ? new - James Amundson - 2014-01-14