Agner's CPU blog

I am in contact with the IEEE 754 working group. Most of these issues have been discussed. The different rounding modes are required by the standard, even though they are rarely used outside of conversion to integer. It is unclear whether subnormal (denormal) numbers must be supported. The latest st...

@elstar. Same as YMM

@Andreas. You are right, thank you.

I have had the opportunity to test a Tiger Lake now. I can confirm that it has more execution units to allow a maximum throughput of five instructions per clock cycle. This includes a maximum of two memory reads and two memory writes per clock cycle. The decoder is still limited to 16 bytes of code ...

@McPh82:

I expect to publish the first soft core this summer with the basic functionality. Keep an eye on www.forwardcom.info.

@tuom. Yes, division got faster. 64 bit integer division on Intel processors is still slow, but 32-bit division is faster. Compilers are using various multiply and shift methods for integer division where the divisor is known at compile time. This is still relevant. Such methods are also needed on i...

@dbyoung

You can make 256 bit floating point vectors with AVX. Please see table 9.1 and 9.2 in the manual.

Please note that this is not a place to seek programming help. Programming questions may be asked at Stackoverflow.com using the tag vector-class-library.

It can use the whole µop cache in a single thread.

@RobertS:
Two threads running the same code in the same core can both use the same entries in the µop cache in Zen 3, but they only get a throughput of 3 µops per clock each. A single thread can get a throughput or 6 µops per clock from the µop cache.

I have now tested the AMD Zen 3 (Ryzen 5800) architecture. The Zen 1 design from AMD was quite successful with substantial improvements over previous models. Zen 2 made significant improvements over Zen 1, and Zen 3 now turns out to be still faster. There are more execution units and several other i...